Modulator and modulation method using non-uniform 16-symbol signal constellation for low-density parity check codeword having 2/15 code rate

ABSTRACT

A modulator and a modulation method using a non-uniform 16-symbol signal constellation are disclosed. The modulator includes a memory and a processor. The memory receives a codeword corresponding to a low-density parity check (LDPC) code having a code rate of 2/15. The processor maps the codeword to 16 symbols of the non-uniform 16-symbol signal constellation on a 4-bit basis.

CROSS-REFERENCE TO RELATED APPLICATIONS

This application claims the benefit of Korean Patent Application Nos.10-2014-0016860 and 10-2015-0017771, filed Feb. 13, 2014 and Feb. 5,2015, respectively, which are hereby incorporated by reference herein intheir entirety.

BACKGROUND

1. Technical Field

Embodiments of the present invention relate to symbol mapping using anon-uniform signal constellation and, more particularly, to a modulatorfor transmitting error correction coded data over a digital broadcastchannel.

2. Description of the Related Art

Bit-Interleaved Coded Modulation (BICM) is bandwidth-efficienttransmission technology, and is implemented in such a manner that anerror-correction coder, a bit-by-bit interleaver and a high-ordermodulator are combined with one another.

BICM can provide excellent performance using a simple structure becauseit uses a low-density parity check (LDPC) coder or a Turbo coder as theerror-correction coder. Furthermore, BICM can provide high-levelflexibility because it can select modulation order and the length andcode rate of an error correction code in various forms. Due to theseadvantages, BICM has been used in broadcasting standards, such as DVB-T2and DVB-NGH, and has a strong possibility of being used in othernext-generation broadcasting systems.

In spite of the above advantage, the BICM exhibits a considerabledifference in connection with the Shannon limit in terms of capacity. Inorder to reduce the difference in connection with the Shannon limit,modulation using a desirable signal constellation is essential.

SUMMARY

At least one embodiment of the present invention is directed to theprovision of a modulator and a modulation method that use a non-uniformsignal constellation more efficient than a uniform signal constellationin order to transmit error correction coded data over a broadcast systemchannel.

At least one embodiment of the present invention is directed to theprovision of a modulator and a modulation method for 16-symbol mapping,which are optimized for an LDPC coder having a code rate of 2/15 and canbe applied to next-generation broadcast systems, such as ATSC 3.0.

In accordance with an aspect of the present invention, there is provideda modulator using a non-uniform 16-symbol signal constellation,including a memory configured to receive a codeword corresponding to alow-density parity check (LDPC) code having a code rate of 2/15; and aprocessor configured to map the codeword to 16 symbols of thenon-uniform 16-symbol signal constellation on a 4-bit basis.

The 16 symbols may have non-uniform distances therebetween, and mayinclude a first group of four symbols of a 1st quadrant, a second groupof four symbols symmetric to the four symbols of the first group withrespect to an imaginary axis, a third group of four symbols symmetric tothe four symbols of the first group with respect to an origin, and afourth group of four symbols symmetric to the four symbols of the firstgroup with respect to a real axis.

A vector corresponding to the four symbols w₀, w₁, w₂ and w₃ of thefirst group may be w, a vector corresponding to the four symbols w₄, w₅,w₆ and w₇ of the second group may be −conj(w) (conj(w) is a functionthat outputs conjugate complex numbers of all elements of w), a vectorcorresponding to the four symbols w₁₂, w₁₃, w₁₄ and w₁₅ of the thirdgroup may be −w, and a vector corresponding to the four symbols w₈, w₉,w₁₀ and w₁₁ of the fourth group may be conj(w).

The amplitudes of real and imaginary components of two of the foursymbols of the first group may be symmetric.

The four symbols of the first group may be w₀, w₁, w₂ and w₃,|real(w₀)|=|imaginary(w₁)|(real(i) is a function that outputs a realcomponent of i, imaginary(i) is a function that outputs an imaginarycomponent of i, and i is an arbitrary complex number),|real(w₁)|=|imaginary(w₀)|, |real(w₂)|=imaginary(w₃)|, and|real(w₃)|=|imaginary(w₂)|.

The 16 symbols may be defined as shown in the following Table:

TABLE w Constellation 0  0.7062 + 0.7075i 1  0.7075 + 0.7062i 2 0.7072 + 0.7077i 3  0.7077 + 0.7072i 4 −0.7062 + 0.7075i 5 −0.7075 +0.7062i 6 −0.7072 + 0.7077i 7 −0.7077 + 0.7072i 8  0.7062 − 0.7075i 9 0.7075 − 0.7062i 10  0.7072 − 0.7077i 11  0.7077 − 0.7072i 12 −0.7062 −0.7075i 13 −0.7075 − 0.7062i 14 −0.7072 − 0.7077i 15 −0.7077 − 0.7072i

In accordance with another aspect of the present invention, there isprovided a modulation method using a non-uniform 16-symbol signalconstellation, including receiving a codeword corresponding to anlow-density parity check (LDPC) code having a code rate of 2/15; mappingthe codeword to one of 16 symbols of the non-uniform 16-symbol signalconstellation on a 4-bit basis; and adjusting any one or more of anamplitude and phase of a carrier in accordance with the mapping.

In accordance with still another aspect of the present invention, thereis provided a BICM device, including an error correction coderconfigured to output an LDPC codeword having a code rate of 2/15; a bitinterleaver configured to interleave the LDPC codeword on a bit groupbasis, corresponding to a parallel factor of the LDPC codeword, and thenoutput the interleaved codeword; and a modulator configured to map theinterleaved codeword to 16 symbols of a non-uniform 16-symbol signalconstellation on a 4-bit basis.

BRIEF DESCRIPTION OF THE DRAWINGS

The above and other objects, features and advantages of the presentinvention will be more clearly understood from the following detaileddescription taken in conjunction with the accompanying drawings, inwhich:

FIG. 1 is a block diagram illustrating a broadcast signal transmissionand reception system according to an embodiment of the presentinvention;

FIG. 2 is an operation flowchart illustrating a broadcast signaltransmission and reception method according to an embodiment of thepresent invention;

FIG. 3 is a diagram illustrating the structure of a parity check matrix(PCM) corresponding to an LDPC code to according to an embodiment of thepresent invention;

FIG. 4 is a diagram illustrating the bit groups of an LDPC codewordhaving a length of 64800;

FIG. 5 is a diagram illustrating the bit groups of an LDPC codewordhaving a length of 16200;

FIG. 6 is a diagram illustrating interleaving that is performed on a bitgroup basis in accordance with an interleaving sequence;

FIG. 7 is a diagram of a 16-QAM signal constellation;

FIGS. 8A and 8B are diagrams of a non-uniform 16-symbol signalconstellation optimized an LDPC code having a code rate of 2/15;

FIG. 9 is a graph illustrating the performance of the uniform signalconstellation illustrated in FIG. 7 and the performance of thenon-uniform signal constellation illustrated in FIG. 8A with respect toan LDPC code having a code rate of 2/15;

FIG. 10 is a block diagram of a modulator using a 16-symbol non-uniformsignal constellation according to an embodiment of the presentinvention; and

FIG. 11 is an operation flowchart of a modulation method using a16-symbol non-uniform signal constellation according to an embodiment ofthe present invention.

DETAILED DESCRIPTION

Embodiments of the present invention will be described in detail belowwith reference to the accompanying drawings. Repeated descriptions anddescriptions of well-known functions and configurations that have beendeemed to make the gist of the present invention unnecessarily obscurewill be omitted below. The embodiments of the present invention areintended to fully describe the present invention to persons havingordinary knowledge in the art to which the present invention pertains.Accordingly, the shapes, sizes, etc. of components in the drawings maybe exaggerated to make the description obvious.

Embodiments of the present invention are described in detail below withreference to the accompanying drawings.

FIG. 1 is a block diagram illustrating a broadcast signal transmissionand reception system according to an embodiment of the presentinvention.

Referring to FIG. 1, it can be seen that a BICM device 10 and a BICMreception device 30 communicate with each other over a wireless channel20.

The BICM device 10 generates an n-bit codeword by encoding k informationbits 11 using an error-correction coder 13. In this case, theerror-correction coder 13 may be an LDPC coder or a Turbo coder.

The codeword is interleaved by a bit interleaver 14, and thus theinterleaved codeword is generated.

In this case, the interleaving may be performed on a bit group basis (bya unit of a bit group). In this case, the error-correction coder 13 maybe an LDPC coder having a length of 16200 and a code rate of 2/15. Acodeword having a length of 16200 may be divided into a total of 45 bitgroups. Each of the bit groups may include 360 bits, i.e., the parallelfactor of an LDPC codeword.

In this case, the interleaving may be performed on a bit group basis (bya unit of a bit group) in accordance with an interleaving sequence,which will be described later.

In this case, the bit interleaver 14 prevents the performance of errorcorrection code from being degraded by effectively distributing bursterrors occurring in a channel. In this case, the bit interleaver 14 maybe separately designed in accordance with the length and code rate ofthe error correction code and the modulation order.

The interleaved codeword is modulated by a modulator 15, and is thentransmitted via an antenna 17.

In this case, the modulator 15 may be based on a concept includingsymbol mapper (symbol mapping device). In this case, the modulator 15may be a symbol mapping device performing 16-symbol mapping which mapscodes onto 16 constellations (symbols).

In this case, the modulator 15 may be a uniform modulator, such as aquadrature amplitude modulation (QAM) modulator, or a non-uniformmodulator.

The modulator 15 may be a symbol mapping device performing NUC(Non-Uniform Constellation) symbol mapping which uses 16 constellations(symbols). That is, the modulator 15 may map the interleaved codeword tothe 16 symbols of the non-uniform 16-symbol signal constellation on a4-bit basis.

The signal transmitted via the wireless channel 20 is received via theantenna 31 of the BICM reception device 30, and, in the BICM receptiondevice 30, is subjected to a process reverse to the process in the BICMdevice 10. That is, the received data is demodulated by a demodulator33, is deinterleaved by a bit deinterleaver 34, and is then decoded byan error correction decoder 35, thereby finally restoring theinformation bits.

It will be apparent to those skilled in the art that the above-describedtransmission and reception processes have been described within aminimum range required for a description of the features of the presentinvention and various processes required for data transmission may beadded.

FIG. 2 is an operation flowchart illustrating a broadcast signaltransmission and reception method according to an embodiment of thepresent invention.

Referring to FIG. 2, in the broadcast signal transmission and receptionmethod according to this embodiment of the present invention, input bits(information bits) are subjected to error-correction coding at stepS210.

That is, at step S210, an n-bit codeword is generated by encoding kinformation bits using the error-correction coder.

In this case, step S210 may be performed as in an LDPC encoding method,which will be described later.

Furthermore, in the broadcast signal transmission and reception method,an interleaved codeword is generated by interleaving the n-bit codewordon a bit group basis at step S220.

In this case, the n-bit codeword may be an LDPC codeword having a lengthof 16200 and a code rate of 2/15. The codeword having a length of 16200may be divided into a total of 45 bit groups. Each of the bit groups mayinclude 360 bits corresponding to the parallel factors of an LDPCcodeword.

In this case, the interleaving may be performed on a bit group basis (bya unit of a bit group) in accordance with an interleaving sequence,which will be described later.

Furthermore, in the broadcast signal transmission and reception method,the encoded data is modulated at step S230.

That is, at step S230, the interleaved codeword is modulated using themodulator.

In this case, the modulator may be based on a concept including symbolmapper (symbol mapping device). In this case, the modulator may be asymbol mapping device performing 16-symbol mapping which maps codes onto16 constellations (symbols).

In this case, the modulator may be a uniform modulator, such as a QAMmodulator, or a non-uniform modulator.

The modulator may be a symbol mapping device performing NUC (Non-UniformConstellation) symbol mapping which uses 16 constellations (symbols).

Furthermore, in the broadcast signal transmission and reception method,the modulated data is transmitted at step S240.

That is, at step S240, the modulated codeword is transmitted over thewireless channel via the antenna.

Furthermore, in the broadcast signal transmission and reception method,the received data is demodulated at step S250.

That is, at step S250, the signal transmitted over the wireless channelis received via the antenna of the receiver, and the received data isdemodulated using the demodulator.

Furthermore, in the broadcast signal transmission and reception method,the demodulated data is deinterleaved at step S260. In this case, thedeinterleaving of step S260 may be reverse to the operation of stepS220.

Furthermore, in the broadcast signal transmission and reception method,the deinterleaved codeword is subjected to error correction decoding atstep S270.

That is, at step S270, the information bits are finally restored byperforming error correction decoding using the error correction decoderof the receiver.

In this case, step S270 corresponds to a process reverse to that of anLDPC encoding method, which will be described later.

An LDPC code is known as a code very close to the Shannon limit for anadditive white Gaussian noise (AWGN) channel, and has the advantages ofasymptotically excellent performance and parallelizable decodingcompared to a turbo code.

Generally, an LDPC code is defined by a low-density parity check matrix(PCM) that is randomly generated. However, a randomly generated LDPCcode requires a large amount of memory to store a PCM, and requires alot of time to access memory. In order to overcome these problems, aquasi-cyclic LDPC (QC-LDPC) code has been proposed. A QC-LDPC code thatis composed of a zero matrix or a circulant permutation matrix (CPM) isdefined by a PCM that is expressed by the following Equation 1:

$\begin{matrix}{{H = \begin{bmatrix}J^{a_{11}} & J^{a_{12}} & \ldots & J^{a_{1n}} \\J^{a_{21}} & J^{a_{22}} & \ldots & J^{a_{2n}} \\\vdots & \vdots & \ddots & \vdots \\J^{a_{m\; 1}} & J^{a_{m\; 2}} & \ldots & J^{a_{mn}}\end{bmatrix}},{{{for}\mspace{14mu} a_{ij}} \in \left\{ {0,1,\ldots\mspace{14mu},{L - 1},\infty} \right\}}} & (1)\end{matrix}$

In this equation, J is a CPM having a size of L×L, and is given as thefollowing Equation 2. In the following description, L may be 360.

$\begin{matrix}{J_{L \times L} = \begin{bmatrix}0 & 1 & 0 & \ldots & 0 \\0 & 0 & 1 & \ldots & 0 \\\vdots & \vdots & \vdots & \ddots & \vdots \\0 & 0 & 0 & \ldots & 1 \\1 & 0 & 0 & \ldots & 0\end{bmatrix}} & (2)\end{matrix}$

Furthermore, J^(i) is obtained by shifting an L×L identity matrix I(J⁰)to the right i (0≦i<L) times, and J^(∞) is an L×L zero matrix.Accordingly, in the case of a QC-LDPC code, it is sufficient if onlyindex exponent i is stored in order to store J¹, and thus the amount ofmemory required to store a PCM is considerably reduced.

FIG. 3 is a diagram illustrating the structure of a PCM corresponding toan LDPC code to according to an embodiment of the present invention.

Referring to FIG. 3, the sizes of matrices A and C are g×K and(N−K−g)×(K+g), respectively, and are composed of an L×L zero matrix anda CPM, respectively. Furthermore, matrix Z is a zero matrix having asize of g×(N−K−g), matrix D is an identity matrix having a size of(N−K−g)×(N−K−g), and matrix B is a dual diagonal matrix having a size ofg×g. In this case, the matrix B may be a matrix in which all elementsexcept elements along a diagonal line and neighboring elements below thediagonal line are 0, and may be defined as the following Equation 3:

$\begin{matrix}{B_{g \times g} = \begin{bmatrix}I_{L \times L} & 0 & 0 & \ldots & 0 & 0 & 0 \\I_{L \times L} & I_{L \times L} & 0 & \ldots & 0 & 0 & 0 \\0 & I_{L \times L} & I_{L \times L} & \vdots & 0 & 0 & 0 \\\vdots & \vdots & \vdots & \ddots & \vdots & \vdots & \vdots \\0 & 0 & 0 & \ldots & I_{L \times L} & I_{L \times L} & 0 \\0 & 0 & 0 & \ldots & 0 & I_{L \times L} & I_{L \times L}\end{bmatrix}} & (3)\end{matrix}$where I_(L×L) is an identity matrix having a size of L×L.

That is, the matrix B may be a bit-wise dual diagonal matrix, or may bea block-wise dual diagonal matrix having identity matrices as itsblocks, as indicated by Equation 3. The bit-wise dual diagonal matrix isdisclosed in detail in Korean Patent Application Publication No.2007-0058438, etc.

In particular, it will be apparent to those skilled in the art that whenthe matrix B is a bit-wise dual diagonal matrix, it is possible toperform conversion into a Quasi-cyclic form by applying row or columnpermutation to a PCM including the matrix B and having a structureillustrated in FIG. 3.

In this case, N is the length of a codeword, and K is the length ofinformation.

The present invention proposes a newly designed QC-LDPC code in whichthe code rate thereof is 2/15 and the length of a codeword is 16200, asillustrated in the following Table 1. That is, the present inventionproposes an LDPC code that is designed to receive information having alength of 2160 and generate an LDPC codeword having a length of 16200.

Table 1 illustrates the sizes of the matrices A, B, C, D and Z of theQC-LDPC code according to the present invention:

TABLE 1 Sizes Code rate Length A B C D Z 2/15 16200 3240 × 3240 × 10800× 10800 × 3240 × 2160 3240 5400 10800 10800

The newly designed LDPC code may be represented in the form of asequence (progression), an equivalent relationship is establishedbetween the sequence and matrix (parity bit check matrix), and thesequence may be represented, as follows:

Sequence Table 1st row: 2889 3122 3208 4324 5968 7241 13215 2nd row: 281923 1077 5252 6099 10309 11114 3rd row: 727 2413 2676 6151 6796 894512528 4th row: 2252 2322 3093 3329 8443 12170 13748 5th row: 575 24892944 6577 8772 11253 11657 6th row: 310 1461 2482 4643 4780 6936 119707th row: 8691 9746 10794 13582 8th row: 3717 6535 12470 12752 9th row:6011 6547 7020 11746 10th row: 5309 6481 10244 13824 11st row: 5327 87738824 13343 12nd row: 3506 3575 9915 13609 13rd row: 3393 7089 1104812816 14th row: 3651 4902 6118 12048 15th row: 4210 10132 13375 13377

An LDPC code that is represented in the form of a sequence is beingwidely used in the DVB standard.

According to an embodiment of the present invention, an LDPC codepresented in the form of a sequence is encoded, as follows. It isassumed that there is an information block S=(s₀, s₁, . . . , s_(K−1))having an information size K. The LDPC encoder generates a codewordΛ=(λ₀, λ₁, λ₂, . . . , λ_(N−1)) having a size of N=K+M₁+M₂ using theinformation block S having a size K. In this case, M₁=g, and M₂=N−K−g.Furthermore, M₁ is the size of parity bits corresponding to the dualdiagonal matrix B, and M₂ is the size of parity bits corresponding tothe identity matrix D. The encoding process is performed, as follows:

Initialization:λ₁ =s _(i) for i=0,1, . . . ,K−1p _(j)=0 for j=0,1, . . . ,M ₁ M+M ₂−1  (4)

First information λ₀ is accumulated at parity bit addresses specified inthe 1st row of the sequence of the Sequence Table. For example, in anLDPC code having a length of 16200 and a code rate of 2/15, anaccumulation process is as follows:

p₂₈₈₉ = p₃₁₂₂ = p₃₂₀₈ = p₄₃₂₄ = p₅₉₆₈ = p₂₈₈₉ ⊕ λ₀ p₃₁₂₂ ⊕ λ₀ p₃₂₀₈ ⊕ λ₀p₄₃₂₄ ⊕ λ₀ p₅₉₆₈ ⊕ λ₀ p₇₂₄₁ = p₁₃₂₁₅ = p₇₂₄₁ ⊕ λ₀ p₁₃₂₁₅ ⊕ λ₀where the addition ⊕ occurs in GF(2).

The subsequent L−1 information bits, that is, λ_(m), m=1, 2, . . . ,L−1, are accumulated at parity bit addresses that are calculated by thefollowing Equation 5:(x+m×Q ₁)mod M ₁ if x<M ₁M ₁+{(x−M ₁ +m×Q ₂)mod M ₂} if x≧M ₁  (5)where x denotes the addresses of parity bits corresponding to the firstinformation bit λ₀, that is, the addresses of the parity bits specifiedin the first row of the sequence of the Sequence Table, Q₁=M₁/L,Q₂=M₂/L, and L=360. Furthermore, Q₁ and Q₂ are defined in the followingTable 2. For example, for an LDPC code having a length of 16200 and acode rate of 2/15, M₁=3240, Q₁=9, M₂=10800, Q₂=30 and L=360, and thefollowing operations are performed on the second bit λ₁ using Equation5:

p₂₈₉₈ = p₃₁₃₁ = p₃₂₁₇ = p₄₃₅₄ = p₅₉₉₈ = p₂₈₉₈ ⊕ λ₁ p₃₁₃₁ ⊕ λ₁ p₃₂₁₇ ⊕ λ₁p₄₃₅₄ ⊕ λ₁ p₅₉₉₈ ⊕ λ₁ p₇₂₇₁ = p₁₃₂₄₅ p₇₂₇₁ ⊕ λ₁ p₁₃₂₄₅ ⊕ λ₁

Table 2 illustrates the sizes of M₁, Q₁, M₂ and Q₂ of the designedQC-LDPC code:

TABLE 2 Sizes Code rate Length M₁ M₂ Q₁ Q₂ 2/15 16200 3240 10800 9 30

The addresses of parity bit accumulators for new 360 information bitsfrom λ_(L) to λ_(2L−1) are calculated and accumulated from Equation 5using the second row of the sequence.

In a similar manner, for all groups composed of new L information bits,the addresses of parity bit accumulators are calculated and accumulatedfrom Equation 5 using new rows of the sequence.

After all the information bits from λ₀ to λ_(K−1) have been exhausted,the operations of the following Equation 6 are sequentially performedfrom i=1:p _(i) =p _(i) ⊕p _(i−1) for i=0,1, . . . ,M ₁−1  (6)

Thereafter, when a parity interleaving operation, such as that of thefollowing Equation 7, is performed, parity bits corresponding to thedual diagonal matrix B are generated:λ_(K+L·t+s) =p _(Q) ₁ _(·s+t) for 0≦s<L,0≦t<Q ₁  (7)

When the parity bits corresponding to the dual diagonal matrix B havebeen generated using K information bits λ₀, λ₁, . . . , λ_(K−1), paritybits corresponding to the identity matrix D are generated using the M₁generated parity bits λ_(K), λ_(K+1), . . . , λ_(K+M) ₁ ₊₁.

For all groups composed of L information bits from λ_(K) to λ_(K+M) ₁⁻¹, the addresses of parity bit accumulators are calculated using thenew rows (starting with a row immediately subsequent to the last rowused when the parity bits corresponding to the dual diagonal matrix Bhave been generated) of the sequence and Equation 5, and relatedoperations are performed.

When a parity interleaving operation, such as that of the followingEquation 8, is performed after all the information bits from λ_(K) toλ_(K+M) ₁ ⁻¹ have been exhausted, parity bits corresponding to theidentity matrix D are generated:λ_(K+M) ₁ _(+L·t+s) =p _(M) ₁ _(+Q) ₂ _(s+t) for 0≦s<L,0≦t<Q ₂  (8)

FIG. 4 is a diagram illustrating the bit groups of an LDPC codewordhaving a length of 64800.

Referring to FIG. 4, it can be seen that an LDPC codeword having alength of 64800 is divided into 180 bit groups (a 0th group to a 179thgroup).

In this case, 360 may be the parallel factor (PF) of the LDPC codeword.That is, since the PF is 360, the LDPC codeword having a length of 64800is divided into 180 bit groups, as illustrated in FIG. 4, and each ofthe bit groups includes 360 bits.

FIG. 5 is a diagram illustrating the bit groups of an LDPC codewordhaving a length of 16200.

Referring to FIG. 5, it can be seen that an LDPC codeword having alength of 16200 is divided into 45 bit groups (a 0th group to a 44thgroup).

In this case, 360 may be the parallel factor (PF) of the LDPC codeword.That is, since the PF is 360, the LDPC codeword having a length of 16200is divided into 45 bit groups, as illustrated in FIG. 5, and each of thebit groups includes 360 bits.

FIG. 6 is a diagram illustrating interleaving that is performed on a bitgroup basis in accordance with an interleaving sequence.

Referring to FIG. 6, it can be seen that interleaving is performed bychanging the order of bit groups by a designed interleaving sequence.

For example, it is assumed that an interleaving sequence for an LDPCcodeword having a length of 16200 is as follows:interleaving sequence={24 34 15 11 2 28 17 25 5 38 19 13 6 39 1 14 33 3729 12 42 31 30 32 36 40 26 35 44 4 16 8 20 43 21 7 0 18 23 3 10 41 9 2722}

Then, the order of the bit groups of the LDPC codeword illustrated inFIG. 4 is changed into that illustrated in FIG. 6 by the interleavingsequence.

That is, it can be seen that each of the LDPC codeword 610 and theinterleaved codeword 620 includes 45 bit groups, and it can be also seenthat, by the interleaving sequence, the 24th bit group of the LDPCcodeword 610 is changed into the 0th bit group of the interleaved LDPCcodeword 620, the 34th bit group of the LDPC codeword 610 is changedinto the 1st bit group of the interleaved LDPC codeword 620, the 15thbit group of the LDPC codeword 610 is changed into the 2nd bit group ofthe interleaved LDPC codeword 620, and the llst bit group of the LDPCcodeword 610 is changed into the 3rd bit group of the interleaved LDPCcodeword 620, and the 2nd bit group of the LDPC codeword 610 is changedinto the 4th bit group of the interleaved LDPC codeword 620.

An LDPC codeword (u ₀ , u ₁ , . . . , u _(N) _(ldpc) ⁻¹) having a lengthof N_(ldpc)(N_(idpc)=16200) is divided into N_(group)=N_(ldpc)/360 bitgroups, as in Equation 9 below:X _(j) ={u _(k)|360×j≦k<360×(j+1),0≦k<N _(ldpc)} for 0≦j<N _(group)  (9)where X_(j) is an j-th bit group, and each X_(j) is composed of 360bits.

The LDPC codeword divided into the bit groups is interleaved, as inEquation 10 below:Y _(j=) X _(π(j))0≦j≦N _(group)  (10)where Y_(j) is an interleaved j-th bit group, and π(j) is a permutationorder for bit group-based interleaving (bit group-unit interleaving).The permutation order corresponds to the interleaving sequence ofEquation 11 below:interleaving sequence={5 33 18 8 29 10 21 14 30 26 11 23 27 4 7 6 24 4438 31 34 43 13 0 15 42 17 2 20 12 40 39 35 32 1 3 41 37 9 25 19 22 16 2836}  (11)

That is, when each of the codeword and the interleaved codeword includes45 bit groups ranging from a 0 th bit group to a 44th bit group, theinterleaving sequence of Equation 11 means that the 5th bit group of thecodeword becomes the 0th bit group of the interleaved codeword, the 33thbit group of the codeword becomes the 1st bit group of the interleavedcodeword, the 18th bit group of the codeword becomes the 2nd bit groupof the interleaved codeword, the 8th bit group of the codeword becomesthe 3rd bit group of the interleaved codeword, . . . , the 28th bitgroup of the codeword becomes the 43th bit group of the interleavedcodeword, and the 36th bit group of the codeword becomes the 44th bitgroup of the interleaved codeword.

In particular, the interleaving sequence of Equation 11 has beenoptimized for a case where 16-symbol mapping (NUC symbol mapping) isemployed and an LDPC coder having a length of 16200 and a code rate of2/15 is used.

In general, broadcasting and communication systems use uniformquadrature amplitude modulation (QAM) in order to transmit errorcorrection coded data.

FIG. 7 is a diagram of a 16-QAM signal constellation.

Referring to FIG. 7, it can be seen that the 16 symbols of a 16-QAMsignal constellation to which 4 bits are mapped are uniformlydistributed.

Although gray mapping is used for bit stream mapping between symbols inFIG. 7, other types of bit stream mapping may be used.

In the uniform 16-QAM signal constellation illustrated in FIG. 7, thedistances between constellation points are uniform. Although uniform QAMhas the advantage of being used regardless of the code rate of an errorcorrection code, it exhibits lower performance than a non-uniform signalconstellation specialized for a specific code rate. In theory, it isknown that both the amplitude of a channel input signal (a transmissionsignal) and the amplitude of a channel itself follow a Gaussiandistribution in an addictive white Gaussian noise (AWGN) channelenvironment, capacity, i.e., the mutual information between atransmission signal and a reception signal, is maximized. Based on thistheoretical background, better performance can be achieved than auniform constellation through the intentional distortion of a signalconstellation.

Symmetric design technology may be used for the design of a non-uniformsignal constellation.

That is, in the case of 16-QAM, after the four signal constellationsymbols of a 1st quadrant have been designed first, the signalconstellation symbols of the remaining three quadrants may besymmetrically designed.

For example, when the vector of the four signal constellation symbols ofthe 1st quadrant is w=(w₀, w₁, w₂, w₃), the vectors of the signalconstellation symbols of the remaining quadrants may be determined, asfollows:

1st quadrant: (w₀, w₁, w₂, w₃)=w

2nd quadrant: (w₄, w₅, w₆, w₇)=−conj(w)

3rd quadrant: (w₁₂, w₁₃, w₁₄, w₁₅)=−w

4th quadrant: (w₈, w₉, w₁₀, w₁₁)=conj(w)

In this case, conj(w) may be a function that outputs the conjugatecomplex numbers of all the elements of w.

It will be apparent that the vectors of signal constellation symbols maybe determined using other various methods.

A symbol w_(i) may have a bit stream mapping value corresponding to adecimal value i. For example, w₃=3₍₁₀₎=0010₍₂₎.

If symmetric design technology is used when a non-uniform signalconstellation is designed, the advantage of considerably reducingcomplexity is achieved.

In order to further reduce design complexity, it may be assumed that theamplitudes of the real and imaginary components of the vector wcorresponding to four signal constellation symbols of the 1st quadrantare symmetric. That is, the amplitudes of the real and imaginarycomponents of two of the four symbols of the 1st quadrant may besymmetric.

In this case, four pulse amplitude modulation (PAM) points rather thanfour complex numbers are designed. In this case, after the smallest PAMvalue has been set to 1 and the remaining three PAM values have beenfound, power may be normalized. As a result, based on theabove-mentioned symmetry, when three PAM values are designed, a total of16 signal constellations may be generated.

In general, in order to design L=M² signal constellations, it issufficient if (M−1) PAM values are designed.

When (M−1) PAM values are obtained, the result obtained by the powernormalization of the obtained (M−1) PAM values and the smallest PAMvalue is defined as PAM_ norm=[P₁ P₂ . . . P_(M)]. When w is obtainedusing PAM_ norm, the following expressions may be obtained based on theassumption that real and imaginary PAM values are symmetric:|real(w ₀)|=|imaginary(w ₁)||real(w ₁)|=|imaginary(w ₀)||real(w ₂)|=|imaginary(w ₃)||real(w ₃)|=|imaginary(w ₂)|where real(i) is a function that outputs the real component of i,imaginary(i) is a function that outputs the imaginary component of i,and i is an arbitrary complex number.

That is, when the real number values of the vector w corresponding to1st quadrant symbols are defined, all the imaginary number values of ware defined accordingly. In the case of 16-QAM in which there are atotal of four symbols in its 1st quadrant, a total of 4!(factorial)=4×3×2×1=24 combinational methods, as shown in Table 3 below.Table 3 below lists 24 methods of obtaining the vector w correspondingto the 1st quadrant symbols:

TABLE 3 Imag- Imag- Imag- Imag- Real inary Real inary Real inary Realinary Method of w₀ of w₀ of w₁ of w₁ of w₂ of w₂ of w₃ of w₃ 1 P₁ P₂ P₂P₁ P₃ P₄ P₄ P₃ 2 P₁ P₂ P₂ P₁ P₄ P₃ P₃ P₄ 3 P₁ P₃ P₃ P₁ P₂ P₄ P₄ P₂ 4 P₁P₃ P₃ P₁ P₄ P₂ P₂ P₄ 5 P₁ P₄ P₄ P₁ P₂ P₃ P₃ P₂ 6 P₁ P₄ P₄ P₁ P₃ P₂ P₂ P₃7 P₂ P₁ P₁ P₂ P₃ P₄ P₄ P₃ 8 P₂ P₁ P₁ P₂ P₄ P₃ P₃ P₄ 9 P₂ P₃ P₃ P₂ P₁ P₄P₄ P₁ 10 P₂ P₃ P₃ P₂ P₄ P₁ P₁ P₄ 11 P₂ P₄ P₄ P₂ P₁ P₃ P₃ P₁ 12 P₂ P₄ P₄P₂ P₃ P₁ P₁ P₃ 13 P₃ P₁ P₁ P₃ P₂ P₄ P₄ P₂ 14 P₃ P₁ P₁ P₃ P₄ P₂ P₂ P₄ 15P₃ P₂ P₂ P₃ P₁ P₄ P₄ P₁ 16 P₃ P₂ P₂ P₃ P₄ P₁ P₁ P₄ 17 P₃ P₄ P₄ P₃ P₁ P₂P₂ P₁ 18 P₃ P₄ P₄ P₃ P₂ P₁ P₁ P₂ 19 P₄ P₁ P₁ P₄ P₂ P₃ P₃ P₂ 20 P₄ P₁ P₁P₄ P₃ P₂ P₂ P₃ 21 P₄ P₂ P₂ P₄ P₁ P₃ P₃ P₁ 22 P₄ P₂ P₂ P₄ P₃ P₁ P₁ P₃ 23P₄ P₃ P₃ P₄ P₁ P₂ P₂ P₁ 24 P₄ P₃ P₃ P₄ P₂ P₁ P₁ P₂

For example, an optimum PAM_ norm value designed for an LDPC code havinga code rate of 2/15 may be [0.7062 0.7075 0.7072 0.7077].

In this case, when the obtained PAM_ norm is converted into the vector wcorresponding to the 1st quadrant symbols using method 1 of Table 3,w=[0.7062+0.7075i 0.7075+0.7062i 0.7072+0.7077i 0.7077+0.7072i] can beobtained.

Table 4 below lists the 16 symbols of a non-uniform 16-symbol signalconstellation optimized for an LDPC code having a code rate of 2/15. Ingeneral, since an error correction code has a varying operating SNR anderror correction capability depending on the code rate, the performanceof BICM can be maximized only when the value of the vector w optimizedfor each code rate is used. If a non-uniform signal constellationoptimized for a specific code rate is used at a different code rate, theperformance of BICM can be considerably reduced, and thus it isimportant to use a non-uniform signal constellation suitable for thecode rate of an LDPC code:

TABLE 4 w Constellation 0  0.7062 + 0.7075i 1  0.7075 + 0.7062i 2 0.7072 + 0.7077i 3  0.7077 + 0.7072i 4 −0.7062 + 0.7075i 5 −0.7075 +0.7062i 6 −0.7072 + 0.7077i 7 −0.7077 + 0.7072i 8  0.7062 − 0.7075i 9 0.7075 − 0.7062i 10  0.7072 − 0.7077i 11  0.7077 − 0.7072i 12 −0.7062 −0.7075i 13 −0.7075 − 0.7062i 14 −0.7072 − 0.7077i 15 −0.7077 − 0.7072i

FIGS. 8A and 8B are a diagram of a non-uniform 16-symbol signalconstellation optimized an LDPC code having a code rate of 2/15.

Referring to FIGS. 8A and 8B, it can be seen that the 16 symbols of a16-QAM signal constellation to which 4 bits are mapped are non-uniformlydistributed. In FIG. 8A, it looks like one symbol in each quadrant asfour symbols in each quadrant are too close, but the locations of thefour symbols in 1st quadrant are shown as in FIG. 8B.

FIGS. 8A and 8B illustrate a non-uniform 16-symbol signal constellationthat is calculated based on a designed w. In this case, although the bitstream of each symbol illustrated in FIGS. 8A and 8B is representedbased on gray mapping, other types of bit stream mapping may be applied.

In particular, FIG. 8B illustrates only 1st quadrant, the locations ofthe symbols in other quadrants may be generated by the locations of thesymbols in the 1st quadrant as explained above.

FIG. 9 is a graph illustrating the performance of the uniform signalconstellation illustrated in FIG. 7 and the performance of thenon-uniform signal constellation illustrated in FIGS. 8A and 8B withrespect to an LDPC code having a code rate of 2/15.

Referring to FIG. 9, it can be seen that the bit error rates (BERs) andframe error rates (FERs) of the non-uniform signal constellationaccording to the present invention and uniform 16-QAM are illustrated.In FIG. 9, the non-uniform signal constellation exhibits superiorperformance compared to the uniform 16-QAM.

FIG. 10 is a block diagram of a modulator using a 16-symbol non-uniformsignal constellation according to an embodiment of the presentinvention.

Referring to FIG. 10, the modulator using a 16-symbol non-uniform signalconstellation according to an embodiment of the present inventionincludes memories 1010 and 1030 and a processor 1020. In this case, themodulator illustrated in FIG. 10 may correspond to the modulator 15illustrated in FIG. 1.

The memory 1010 receives a codeword corresponding to an LDPC code havinga code rate of 2/15.

In this case, the codeword may be an error correction coded LDPCcodeword, and may be an LDPC codeword interleaved codeword.

The processor 1020 maps codewords to the 16 symbols of a non-uniform16-symbol signal constellation on a 4-bit basis.

In this case, the processor 1020 may adjust any one of the amplitude andphase of a carrier corresponding to symbol mapping.

In this case, the 16 symbols have non-uniform distances therebetween,and may include a first group of four symbols of a 1st quadrant, asecond group of four symbols symmetric to the four symbols of the firstgroup with respect to an imaginary axis, a third group of four symbolssymmetric to the four symbols of the first group with respect to anorigin, and a fourth group of four symbols symmetric to the four symbolsof the first group with respect to a real axis.

In this case, if a vector corresponding to the four symbols w₀, w₁, w₂and w₃ of the first group is w, a vector corresponding to the foursymbols w₄, w₅, w₆ and w₇ of the second group may be −conj(w) (conj(w)is a function that outputs the conjugate complex numbers of all theelements of w), a vector corresponding to the four symbols w₁₂, w₁₃, w₁₄and w₁₅ of the third group may be −w, and a vector corresponding to thefour symbols w₈, w₉, w₁₀ and w₁₁ of the fourth group may be conj(w).

In this case, the amplitudes of the real and imaginary components of twoof the four symbols of the first group may be symmetric.

In this case, the four symbols of the first group are w₀, w₁, w₂ and w₃,|real(w₀)=|imaginary(w₁)|(real(i) is a function that outputs the realcomponent of i, imaginary(i) is a function that outputs the imaginarycomponent of i, and i is an arbitrary complex number),|real(w₁)|=|imaginary(w₀)|,|real(w₂)|=|imaginary(w₃)|, and|real(w₃)|=|imaginary(w₂)|.

In this case, the 16 symbols may be defined as listed in the above Table4.

The memory 1030 may store additional information required for theoperation of the processor 1020. For example, the memory 1030 may storeinformation about a carrier frequency, an amplitude, etc.

The memory 1010 and the memory 1030 may correspond to various pieces ofhardware for storing a set of bits, and may correspond to datastructures, such as an array, a list, a stack, a queue and the like.

In this case, the memory 1010 and the memory 1030 may not be separatephysical devices, but may correspond to different addresses of a singlephysical device. That is, the memory 1010 and the memory 1030 may not bephysically distinguished from each other, and may be only logicallydistinguished from each other.

FIG. 11 is an operation flowchart of a modulation method using a16-symbol non-uniform signal constellation according to an embodiment ofthe present invention.

Referring to FIG. 11, in the modulation method using a 16-symbolnon-uniform signal constellation according to the present embodiment, acodeword corresponding to an LDPC code having a code rate of 2/15 isreceived first at step S1110.

In this case, the codeword may be an error correction coded LDPCcodeword or an LDPC codeword interleaved codeword. That is, at stepS1110, the codeword may be received directly from an LDPC coder, or thecodeword may be received by way of a bit interleaver.

Furthermore, in the modulation method using a 16-symbol non-uniformsignal constellation according to the present embodiment, the codewordis mapped to the 16 symbols of the non-uniform 16-symbol signalconstellation on a 4-bit basis at step S1120.

In this case, the 16 symbols have non-uniform distances therebetween,and may include a first group of four symbols of a 1st quadrant, asecond group of four symbols symmetric to the four symbols of the firstgroup with respect to an imaginary axis, a third group of four symbolssymmetric to the four symbols of the first group with respect to anorigin, and a fourth group of four symbols symmetric to the four symbolsof the first group with respect to a real axis.

In this case, a vector corresponding to the four symbols w₀, w₁, w₂ andw₃ of the first group may be w, a vector corresponding to the foursymbols w₄, w₅, w₆ and w₇ of the second group may be −conj(w) (conj(w)is a function that outputs the conjugate complex numbers of all theelements of w), a vector corresponding to the four symbols w₁₂, w₁₃, w₁₄and w₁₅ of the third group may be −w, and a vector corresponding to thefour symbols w₈, w₉, w₁₀ and w₁₁ of the fourth group may be conj(w).

In this case, the amplitudes of the real and imaginary components of twoof the four symbols of the first group may be symmetric.

In this case, the four symbols of the first group are w₀, w₁, w₂ and w₃,|real(w₀)|=|imaginary(w₁)|(real(i) is a function that outputs the realcomponent of i, imaginary(i) is a function that outputs the imaginarycomponent of i, and i is an arbitrary complex number),|real(w₁)|=|imaginary(w₀)|, |real(w₂)|=|imaginary(w₃)|, and|real(w₃)|=|imaginary(w₂)|.

In this case, the 16 symbols may be defined as listed in the above Table4.

Furthermore, in the modulation method using a 16-symbol non-uniformsignal constellation according to the present embodiment, any one ormore of the amplitude and phase of a carrier are adjusted in accordancewith the mapping at step S1130.

The error correction coder 13 illustrated in FIG. 1 may be implementedin a structure illustrated in FIG. 10.

That is, the error-correction coder may include memories and aprocessor. In this case, the first memory is a memory that stores anLDPC codeword having a length of 16200 and a code rate of 2/15, and asecond memory is a memory that is initialized to 0.

The memories may correspond to λ_(i)(i=0, 1, . . . , N−1) and P_(j)(j=0,1, . . . , M₁+M₂−1), respectively.

The processor may generate an LDPC codeword corresponding to informationbits by performing accumulation with respect to the memory using asequence corresponding to a parity check matrix (PCM).

In this case, the accumulation may be performed at parity bit addressesthat are updated using the sequence of the above Sequence Table.

In this case, the LDPC codeword may include a systematic part λ₀, λ₁, .. . , λ_(K−1) corresponding to the information bits and having a lengthof 2160 (=K), a first parity part λ_(K), λ_(K+1), . . . , λ_(K+M) ₁ ⁻¹corresponding to a dual diagonal matrix included in the PCM and having alength of 3240 (=M₁=g), and a second parity part λ_(K+M) ₁ , λ_(K+M) ₁₊₁, . . . , λ_(K+M) ₁ _(+M) ₂ ⁻¹ corresponding to an identity matrixincluded in the PCM and having a length of 10800 (=M₂).

In this case, the sequence may have a number of rows equal to the sum(2160/360+3240/360=15) of a value obtained by dividing the length of thesystematic part, that is, 2160, by a CPM size L corresponding to thePCM, that is, 360, and a value obtained by dividing the length M₁ of thefirst parity part, that is, 3240, by 360.

As described above, the sequence may be represented by the aboveSequence Table.

In this case, the second memory may have a size corresponding to the sumM₁+M₂ of the length M₁ of the first parity part and the length M₂ of thesecond parity part.

In this case, the parity bit addresses may be updated based on theresults of comparing each x of the previous parity bit addresses,specified in respective rows of the sequence, with the length M₁ of thefirst parity part.

That is, the parity bit addresses may be updated using Equation 5. Inthis case, x may be the previous parity bit addresses, m may be aninformation bit index that is an integer larger than 0 and smaller thanL, L may be the CPM size of the PCM, Q₁ may be M₁/L, M₁ may be the sizeof the first parity part, Q₂ may be M₂/L, and M₂ may be the size of thesecond parity part.

In this case, it may be possible to perform the accumulation whilerepeatedly changing the rows of the sequence by the CPM size L (=360) ofthe PCM, as described above.

In this case, the first parity part λ_(K), λ_(K+1), . . . , λ_(K+M) ₁ ⁻¹may be generated by performing parity interleaving using the firstmemory and the second memory, as described in conjunction with Equation7.

In this case, the second parity part λ_(K+M) ₁ , λ_(K+M) ₁ ₊₁, . . . ,λ_(K+M) ₁ _(+M) ₂ ₊₁ may be generated by performing parity interleavingusing the first memory and the second memory after generating the firstparity part λ_(K), λ_(K+1), . . . , λ_(K+M) ₁ ⁻¹ and then performing theaccumulation using the first parity part λ_(K), λ_(K+1), . . . , λ_(K+M)₁ ⁻¹ and the sequence, as described in conjunction with Equation 8.

The bit interleaver 14 illustrated in FIG. 1 may be also implemented ina structure illustrated in FIG. 10.

That is, the first memory may store an LDPC codeword having a length of16200 and a code rate of 2/15. The processor may generate an interleavedcodeword by interleaving the LDPC codeword on a bit group basis, inwhich the bit group corresponds to the parallel factor of the LDPCcodeword. In this case, the parallel factor may be 360. In this case,the bit group may include 360 bits. In this case, the LDPC codeword maybe divided into 45 bit groups, as represented by Equation 9.

In this case, the interleaving may be performed using Equation 10 usingpermutation order.

In this case, the permutation order may correspond to the interleavingsequence represented by Equation 11.

The second memory provides the interleaved codeword to the modulator for16-symbol mapping.

In this case, the modulator may be a symbol mapping device fornon-uniform constellation (NUC) symbol mapping, as described inconjunction with FIG. 10.

In accordance with at least one embodiment of the present invention, asignal constellation signal constellation for the transmission of errorcorrection coded data in a next-generation broadcast system isintentionally distorted, thereby achieving considerably improvedperformance compared to a uniform signal constellation.

In accordance with at least one embodiment of the present invention, anon-uniform 16-symbol signal constellation is optimized for an LDPCcoder having a code rate of 2/15 and thus can be applied tonext-generation broadcast systems, such as ATSC 3.0.

Although the specific embodiments of the present invention have beendisclosed for illustrative purposes, those skilled in the art willappreciate that various modifications, additions and substitutions arepossible without departing from the scope and spirit of the invention asdisclosed in the accompanying claims.

What is claimed is:
 1. A modulator using a non-uniform 16-symbol signalconstellation, comprising: a memory configured to receive a codewordhaving a code rate of 2/15; and a processor configured to map thecodeword to 16 symbols of the non-uniform 16-symbol signal constellationon a 4-bit basis, wherein the 16 symbols are defined as shown in thefollowing Table: TABLE w Constellation 0  0.7062 + 0.7075i 1  0.7075 +0.7062i 2  0.7072 + 0.7077i 3  0.7077 + 0.7072i 4 −0.7062 + 0.7075i 5−0.7075 + 0.7062i 6 −0.7072 + 0.7077i 7 −0.7077 + 0.7072i 8  0.7062 −0.7075i 9  0.7075 − 0.7062i 10  0.7072 − 0.7077i 11  0.7077 − 0.7072i 12−0.7062 − 0.7075i 13 −0.7075 − 0.7062i 14 −0.7072 − 0.7077i 15  −0.7077− 0.7072i.


2. The modulator of claim 1, wherein the 16 symbols comprise a firstgroup of four symbols of a 1st quadrant, a second group of four symbolssymmetric to the four symbols of the first group with respect to animaginary axis, a third group of four symbols symmetric to the foursymbols of the first group with respect to an origin, and a fourth groupof four symbols symmetric to the four symbols of the first group withrespect to a real axis, and distances between the 16 symbols arenon-uniform.
 3. The modulator of claim 2, wherein a vector correspondingto the four symbols w₀, w₁, w₂, and w₃ of the first group is w, a vectorcorresponding to the four symbols w₄, w₅, w₆ and w₇ of the second groupis −conj(w) (conj(w) is a function that outputs conjugate complexnumbers of all elements of w), a vector corresponding to the foursymbols w₁₂, w₁₃, w₁₄ and w₁₅ of the third group is −w, and a vectorcorresponding to the four symbols w₈, w₉, w₁₀ and w_(ii) of the fourthgroup is conj(w).
 4. The modulator of claim 3, wherein the four symbolsof the first group are w₀, w₁, w₂ and w₃, |real(w₀)|=|imaginary(w₁)|(real(i) is a function that outputs a real component of i, imaginary(i)is a function that outputs an imaginary component of i, and i is anarbitrary complex number), |real(w₁)|=|imaginary(w₀)|,|real(w₂)|=|imaginary(w₃)|, and |real(w₃)|=|imaginary(w₂)|.